The majority of present day integrated circuits (ICs) are implemented by using a plurality of interconnected field effect transistors (FETs), also called metal oxide semiconductor field effect transistors (MOSFETs or MOS transistors). The ICs are usually formed using both P-channel (PMOS) and N-channel (NMOS) FETs and the IC is then referred to as a complementary MOS or CMOS circuit. Certain improvements in performance of MOS ICs can be realized by forming the MOS transistors in a thin layer of semiconductor material overlying an insulator layer. Such semiconductor on insulator (SOI) MOS transistors, for example, exhibit lower junction capacitance and hence can operate at higher speeds. It is advantageous in certain applications, however, to fabricate at least some devices in the semiconductor substrate that supports the insulator layer. The devices formed in the substrate, for example, may have better thermal properties and can support higher voltages than devices formed in the thin semiconductor layer. High voltage transistors generate self heating during operation, and it is difficult to dissipate the heat so generated if the transistors are fabricated in the thin layer of semiconductor material because of the low thermal conductivity of the insulator layer separating the thin layer from the supporting substrate. The heating can reduce the mobility of majority carriers in the channel and can compromise reliability of the IC. In contrast, heat generated in high voltage transistors, if the transistors are formed in the supporting substrate, would be able to dissipate because of the relatively high thermal conductivity of the supporting substrate.
Accordingly, it is desirable to provide an SOI MOS component having a substrate transistor integrated with MOS transistors formed in and on the thin semiconductor layer. In addition, it is desirable to provide methods for fabricating an MOS transistor in the supporting substrate of an SOI component and especially to provide methods for integrating methods for fabricating substrate MOS transistors with methods for fabricating complementary MOS transistors in the thin semiconductor layer. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.